# Digital: the logic simulator a teacher can actually hand out

> Digital is a GPL-3.0 Java application for designing and simulating digital logic circuits, built for education: FSM editors, executable test cases, a 74xx chip library, VHDL and Verilog export toward BASYS3 and TinyFPGA hardware, and examples up to a MIPS-like CPU. It unpacks from a zip and needs only a Java 8 runtime.

**hneemann/Digital** — A digital logic designer and circuit simulator.

- Repository: https://github.com/hneemann/Digital
- Stars: 6,044 · Forks: 603
- Language: Java
- License: GPL-3.0
- Published: 2026-09-22 · Updated: 2026-09-22 · Language: en
- Canonical page: https://hysenlabs.com/projects/hneemann-digital

## Written because Logisim retired

The motivation section of the README is a small history of educational simulation. The author used Logisim, Carl Burch's proven teaching tool, which was actively developed until 2011; anyone who knows Logisim will recognize Digital's wire color scheme as an inheritance. In 2013 Burch began a successor called Toves, having judged weaknesses in Logisim's architecture too difficult to overcome, but Toves was discontinued at an early stage, and in 2014 Logisim itself was retired. A family of forks, Logisim-evolution among them, continued that codebase, while Digital took the other road: a new simulator with, as its feature list bluntly puts it, no legacy code. The purpose stayed constant throughout the divergence, an easy-to-use tool designed for educational use, GPL-3.0 licensed and written in Java.

## Unzip, then java -jar

Installation is a deliberate non-event, which for classroom software is a feature. There is nothing to install: unpack the Digital.zip from the latest GitHub release, start the included shell script on Linux, or start the JAR directly on Windows and macOS. The one requirement is a Java Runtime Environment of at least version 8, with the README pointing Windows users to the Eclipse Temurin distribution as the easiest source. If startup misbehaves, the documented diagnostic path is to run the JAR from a command line inside the Digital folder so errors are visible:

```bash
java -jar Digital.jar
```

For a computer lab, that profile matters more than any benchmark: one zip file, one runtime dependency, no installer touching the registry, and a troubleshooting step that produces readable output.

## Test cases, FSMs and a 74xx library

The features aimed at coursework are the quiet ones. Circuits can carry test cases that you create and execute to verify a design, turning grading and self-checking from eyeballing waveforms into running an assertion suite. A simple editor for finite state machines lets a student draw an FSM, convert it to a state transition table, and then convert that into a circuit implementing it, collapsing three textbook chapters into one guided flow. Analysis and synthesis cover both combinatorial and sequential circuits. A library of the most commonly used 74xx series integrated circuits is built in, so exercises built around real historical part numbers work directly, and signal states visualize through measurement graphs, with a single gate mode available for analyzing oscillations, the kind of failure students otherwise meet only as confusion. Because the test cases are themselves ordinary circuits, students can read one another's suites, which turns verification into something teachable rather than an afterthought.

## From a transmission-gate flip-flop to a CPU at 120 kHz

The examples set the ambition curve: from a transmission gate D-flip-flop, a fine first-week exercise, up to a complete, simple, MIPS-like single cycle CPU. Performance is documented concretely, the example processor can be clocked at 120 kHz in simulation, a number that makes the difference between a demo and a usable lab visible. Scale is addressed with its own exhibit, a Conway's Game of Life example built from about 2400 active components that runs without complaint. Generic circuits provide parameterization, so a barrel shifter can be instantiated with a selectable bit width rather than redrawn per assignment, and custom components can be written in Java, packed in a jar, and dropped in, with a separate example repository demonstrating the pattern. Almost all examples ship with test cases, which keeps the collection honest.

## VHDL, Verilog and the road to real silicon

The bridge from schematic to hardware is unusually complete for an educational tool. Components can be described in VHDL or Verilog, simulated by integrating the open source ghdl and Icarus Verilog simulators respectively, each of which must be installed separately. In the other direction, circuits export to VHDL or Verilog, with direct support for the BASYS3 board and the TinyFPGA BX, and the examples folder includes a variant of the example CPU configured to run on a BASYS3. For older programmable logic, JEDEC files export directly for flashing GAL16v8 and GAL22v10 devices, chips the README cheerfully dates to 1985 while defending them as easy to understand and well documented for beginners, with the ATF150x family supported too, offering up to 128 macrocells and in-system programming. Even paper output is covered, with SVG export including a LaTeX and Inkscape compatible variant for course materials.

## A TCP port so an assembler can drive the CPU you built

Among the features is one with a whole lab course hiding inside it: a simple remote TCP interface, implemented in the manner documented in the companion Assembler project's RemoteInterface, which allows an assembler IDE to control the simulator. The workflow that enables is the point: a student designs a CPU in Digital, writes assembly for it in the author's assembler IDE, and debugs the program against the simulated processor over that socket, a tight loop between computer architecture and systems programming that usually requires two disjoint toolchains. It is the feature that turns Digital from a drawing tool into part of a working toolchain, and the existence of both halves in the same author's repositories suggests the pairing is intentional rather than incidental. Nothing in the simulator depends on that one client, since any tool speaking the same simple TCP protocol can take the controller role.

## Seven-language docs and honest coverage arithmetic

The documentation ships in English, German, Spanish, Portuguese, French, Italian and simplified Chinese, with the README's candor that it is still very incomplete, offset by a First Steps chapter, a list of the available 74xx chips and the keyboard shortcuts. Translation contribution is designed for non-developers: the author provides a special translation file, easier to edit than the application's language files, which can be emailed back without touching GitHub or Java source. Test coverage is reported with its asterisk attached, about 80 percent overall, with CodeCov only able to see about 50 percent because GUI tests and HDL integration tests do not run on the CI servers. The build is Maven with a custom checkstyle configuration, CI configurations exist for both Travis and Bitbucket, releases run v0.29 in 2022, v0.30 in 2023 and v0.31 in 2024-09, and the last push came on 2026-09-07, with unreleased changes tracked in distribution/ReleaseNotes.txt.

## Conclusion

Use Digital for teaching or learning digital logic when you want a tool with no install ceremony, executable test cases and a path from schematic to real programmable hardware. Prefer Logisim-evolution if your course already standardizes on the Logisim lineage, since Digital deliberately broke from that compatibility to start clean. Verify first that target machines have a Java 8 or newer runtime, install ghdl or Icarus Verilog if your course uses HDL-described components, and read the First Steps chapter of the documentation before the first lab session.

## FAQ

### What is Digital, the circuit simulator?

Digital is a GPL-3.0 Java application for designing and simulating digital logic circuits, built for educational use. It ships as a zip with no installation step and requires only a Java 8 or newer runtime.

### How do you run Digital?

Download Digital.zip from the latest GitHub release and unpack it, then start the shell script on Linux or the JAR directly on Windows and macOS. A Java Runtime Environment of at least version 8 is required, and if startup fails, run java -jar Digital.jar from the Digital folder to see the error.

### Can Digital export circuits to real hardware?

Yes. Circuits export to VHDL or Verilog with direct support for the BASYS3 board and the TinyFPGA BX, and JEDEC files can be flashed to GAL16v8, GAL22v10 and ATF150x programmable logic chips.

## Sources

- [hneemann/Digital on GitHub](https://github.com/hneemann/Digital)
- [Issues](https://github.com/hneemann/Digital/issues)
- [License: GPL-3.0](https://github.com/hneemann/Digital/blob/master/LICENSE)
- [README](https://github.com/hneemann/Digital/blob/master/README.md)
- [Releases](https://github.com/hneemann/Digital/releases)

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Hysen Labs editorial analysis, written from the project's own repository and release notes. Cite the canonical page: https://hysenlabs.com/projects/hneemann-digital