Chisel Bootcamp teaches hardware generators, and admits its tooling has aged
Generator Bootcamp Material: Learn Chisel the Right Way
At a glance
- What is it?
- Chisel Bootcamp is a notebook-based course from the Chisel and Rocket Chip authors that teaches the Scala subset needed for hardware generators, combinational and sequential logic, testing with chiseltest, and the FIRRTL intermediate representation, with dsptools and Rocket Chip as the destination. The project is Apache 2.0 licensed, and its own README warns that parts of the Jupyter Binder setup have bit-rotted.
- Who is it for?
- Chisel Bootcamp remains the shortest sensible route into Chisel for a hardware engineer who already knows Verilog or VHDL, because the generators argument is made properly and the FIRRTL notebooks show what your Scala is actually producing, which is the part most tutorials skip.
- Can I use it commercially?
- Yes. Apache-2.0 is a permissive licence: you can use, modify and sell software built on it, as long as you keep its copyright and licence notices.
- Is it still maintained?
- Yes. The repository last received commits 32 days ago.
- What is it written in?
- Mainly Jupyter Notebook, according to GitHub's language statistics.
Answers come from the project's GitHub data, last synced on October 23, 2026, and from our analysis. They are not legal advice.
Editorial analysis
Hardware designs as generators, not instances
The motivation section is the real content of the bootcamp, and it is a critique of how hardware description languages are usually taught. All HDLs support writing single instances, but writing instances is tedious, and the question the README asks is why anyone would make the same mistakes writing a slightly modified version of something somebody else has already designed. Verilog supports limited parameterisation, such as bitwidths and generate statements, but that only gets you so far, and if you cannot write a Verilog generator you write a new instance, which doubles the code size. The proposed alternative is one program that generates both hardware instances. A generator should be composable, powerful, and give fine-grained control over the generated design, and it needs error checking, which means the generator language has to understand the semantics of the design well enough to know what is legal. It must also not be overly verbose, and it must be a zero-cost abstraction, because hardware performance is sensitive to small changes and you need to be able to specify the microarchitecture exactly. The README also draws the line against high-level synthesis, which is a different thing entirely.
Four modules, and the notebooks are numbered for order
The course is divided into modules and subdivided further, and the repository root is the module list. This README serves as module 0, an introduction and motivation. Module 1 gives a quick introduction to Scala, teaching enough to start writing Chisel while teaching more Scala along the way. Chisel itself starts in module 2 with a hardware example broken down, then covers combinational and sequential logic plus software and hardware control flow, and the module names in the tree make the sequence visible, 2.1_first_module, 2.2_comb_logic, 2.3_control_flow, 2.4_sequential_logic, 2.5_exercise and 2.6_chiseltest. Module 3 teaches how to write hardware generators that take advantage of Scala's high-level features, and the stated goal by the end of it is to read and understand most of the Chisel code base and begin using Rocket Chip. Module 4 then goes below Chisel, with notebooks on the FIRRTL AST, traversing it, common idioms and adding operations per module, which is the part that explains what the generator produced.
Tests and the two libraries worth seeing
One of the stated learning outcomes is how to write unit tests for Chisel designs, and the 2.6_chiseltest notebook is where that happens. The other is a basic introduction to some useful features in Chisel libraries, naming dsptools and Rocket Chip. The distinction the course draws between them is a good one to keep in mind. dsptools and Rocket Chip are the two libraries the README names, and both are places where the generator ideas are meant to be applied at scale. The claim in the README is that after the course you can read and understand most of the Chisel code base and begin using Rocket Chip, and the practical test of that claim is to open a Rocket Chip module after finishing module 3 and see whether it looks like Scala.
The Docker image pins Scala 2.12 and a Java 8 kernel
The runtime is specified precisely in the Dockerfile, and the versions are the interesting part. The base image is ubuntu 20.04 with ca-certificates-java, curl, graphviz, openjdk-8-jre-headless and python3-distutils installed, and pip is used to install the notebook package. The Scala and kernel versions are pinned as environment variables:
ENV SCALA_VERSION=2.12.10
ENV ALMOND_VERSION=0.9.1
ENV COURSIER_CACHE=/coursier_cacheThe Scala kernel is Almond, and it is fetched with the coursier command line tool, bootstrapped with the jitpack repository and the sh.almond scala-kernel artifact for the pinned Scala version, then installed globally so the kernel is registered with Jupyter. The build has three stages. The base stage, an intermediate builder that downloads the kernel into the coursier cache, and a final stage that copies the cache and the installed kernel across. One step in the builder is worth noting, because it is a good habit for an image meant to be used offline. A notebook is executed during the build to pull Chisel into the image:
RUN jupyter nbconvert --to notebook --output=/tmp/0_demo --execute 0_demo.ipynbso the dependency is baked in rather than fetched on first use. The base stage creates a non-root bootcamp user, and the final stage chowns the working directory to it and switches to it.
The bit-rot warning and the kernel crash FAQ
The first thing in the README is a warning that some features of the Jupyter Binder project have bit-rotted, that the teachings are still valid and the majority of the exercises still work, but that you will encounter errors. That candour is unusual and useful, because a tutorial that has silently rotted teaches you to distrust every tutorial. The FAQ gives the most common failure in full, a kernel crash on startup with a NullPointerException from the Ammonite runtime classpath during interpreter initialisation, and the fix is one line. Make sure that Java 8 is selected for running Jupyter. The stack trace shows the path through jupyter.kernel.server.ServerApp, the Scala application wrapper and Ammonite's classpath, which is enough to recognise it. There is also a note for previous users of the bootcamp, that the course was upgraded from Scala 2.11 to Scala 2.12, and that anyone hitting errors should follow the installation instructions to upgrade to 2.12.
What the course deliberately leaves out
The outline names its own gaps, and they are the right ones to know before you commit. The tutorial does not yet cover SBT, it does not cover build systems, it does not cover backend flows for FPGA or ASIC processes, and it does not cover analog circuits. Read that list as a description of what Chisel is not. Chisel is a front end that produces FIRRTL, and the flow from FIRRTL to Verilog, to synthesis, to a bitstream or to a netlist is a separate set of tools with a separate set of failure modes. A course that taught the whole path would spend most of its time on toolchain configuration. What this course does instead is spend its time on the generator idea, which is the part that transfers, and the FIRRTL notebooks in module 4 exist to close the loop between the Scala you wrote and the intermediate representation that comes out, so that debugging a generator does not mean reading a stack of generated Verilog. The other practical note is the two routes in, a hosted Binder link that needs no local installation and an Install.md for running it yourself.
Apache 2.0, Berkeley lineage, and a maintained but dated course
The project comes from the same Berkeley group behind Chisel and Rocket Chip, and the contributors listed in the README are Berkeley addresses, with Stevo Bailey, Adam Izraelevitz, Richard Lin, Chick Markley, Paul Rigge and Edward Wang. The licence is Apache 2.0 with a LICENSE file in the root, which is the permissive choice and appropriate for course material that you may want to reuse in a lab or an internal training. The repository also has a Dockerfile, a Dockerfile for the binder directory, an Install.md with local setup steps, a OneDayAgenda.md for a condensed version of the material, images, a runtest.py script and a source/ directory holding the custom Jupyter configuration that the Dockerfile copies into the Jupyter config directory. The last push was on 2026-09-21 and the project is not archived, so the material is still being touched, but there are no GitHub releases, and the pinned Scala 2.12, the Java 8 requirement and the acknowledged Binder rot are all signs of a course whose content has outlived its environment.
Editorial conclusion
Chisel Bootcamp remains the shortest sensible route into Chisel for a hardware engineer who already knows Verilog or VHDL, because the generators argument is made properly and the FIRRTL notebooks show what your Scala is actually producing, which is the part most tutorials skip. It is not a course for someone who wants a current development environment, because the pinned Scala 2.12, the Java 8 requirement for the notebook kernel and the acknowledged Binder rot are all symptoms of a project whose toolchain has moved on. Before you start, read the kernel crash entry and select Java 8 for Jupyter as the FAQ instructs, expect to hit errors that the maintainers have already documented, and treat the hardware generator ideas as the durable content rather than the environment as the product.
Frequently asked questions
Do I need to install anything to try the Chisel Bootcamp?
No, there is a hosted Jupyter Binder link in the README that needs no local installation. If you want it locally, the installation instructions are in Install.md, and the Dockerfile in the repository builds the same environment with Scala 2.12.10 and the Almond kernel 0.9.1.
Why does the Scala notebook kernel crash on startup?
The FAQ shows the failure as a NullPointerException from the Ammonite runtime classpath during interpreter initialisation, and the fix is to make sure Java 8 is selected for running Jupyter. The same section notes that some Jupyter Binder features have bit-rotted and that you will encounter errors even though most exercises still work.
What does the Chisel Bootcamp cover, and what does it leave out?
It covers the Scala you need, Chisel from a first module through combinational and sequential logic and control flow, how to write hardware generators, unit testing with chiseltest, and the FIRRTL AST, with an introduction to dsptools and Rocket Chip. It does not cover SBT, build systems, FPGA or ASIC backend flows, or analog circuits.
What is the argument for hardware generators over Verilog instances?
Writing instances is tedious and Verilog parameterisation is limited, so a slightly modified design has to be written out again, which doubles the code size. A generator is one program that produces many instances, and it should be composable, powerful, fine-grained, checked for legality, not verbose, and a zero-cost abstraction, which is what Chisel aims to be.
Official sources
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