ch32v003: a RISC-V microcontroller with 2KB of RAM in a package that costs cents

What the part is: a RISC-V core in a very small budget

The repository describes the CH32V003 as an ultra-cheap RISC-V MCU with 2KB SRAM, 16KB flash, and up to 18 GPIOs that sells for under $0.10.

The readme gives the more formal framing: the CH32V003 series is an industrial-grade general-purpose microcontroller designed based on the RISC-V2A core of barley, the vendor's own core name, and it supports a system clock frequency of 48MHz with wide voltage tolerance, single-wire debugging, low power consumption and ultra-small packaging.

So the design centre is a general purpose part in the smallest and cheapest package available, with the caveat that the word industrial-grade refers to the temperature and voltage ratings rather than to the compute. Two kilobytes of SRAM is the constraint that dominates every design decision made on this chip, and sixteen kilobytes of flash is the constraint that dominates the toolchain choices.

The audience is an embedded developer who has decided that a three-cent microcontroller with a RISC-V instruction set is enough for the job. That could be a battery-powered sensor, a simple actuator, a keyboard matrix, or a part of a larger board where the main processor does the thinking.

It is not a general purpose computer. Nothing in the readme suggests it is, and the price point makes clear that it is not.

The peripheral list, and what a 2KB RAM budget does to it

The feature list is worth reading closely, because the constraints are in it.

On the processor side there is a QingKe 32-bit RISC-V2A processor supporting 2 levels of interrupt nesting, a maximum 48MHz system main frequency, 2KB SRAM and 16KB Flash, and a power supply voltage of 3.3 or 5V with multiple low-power modes in Sleep and Standby, plus power on and off reset and a programmable voltage detector.

The peripherals are compact but complete for a part of this size. There is 1 group of 1-channel general-purpose DMA controller, 1 group of op-amp comparator, 1 group of 10-bit ADC, a 1x16-bit advanced-control timer and a 1x16-bit general-purpose timer, 2 WDOG and a 1x32-bit SysTick, and 1 USART interface, 1 group of I2C interface and 1 group of SPI interface. On the pin and identity side there are 18 I/O ports with one mapping an external interrupt, a 96-bit chip unique ID, and the 1-wire serial debug interface, which is the SDI interface.

The packages are TSSOP20, QFN20, SOP16 and SOP8, so there is a genuinely small-footprint option.

The readme also states the operating voltage rating of 3.3V or 5V and an industrial-grade temperature range of -40C to 85C, and the overview lists the common peripheral functions including a built-in DMA controller, a 10-bit ADC, a comparator, multiple timers and standard communication interfaces such as USART, I2C and SPI.

What the readme does not give is the RAM budget guidance, and that is what a developer will actually need. With 2KB of SRAM, the stack depth, the number of concurrent interrupt handlers and whether the vendor's C library fits at all are the questions that decide the design, and the answers are in the datasheet and the demo code rather than in the readme.

What is in the repository: docs, demos, schematics and the programmer

The top-level entries tell you what kind of resource this is, and it is a resource rather than a library.

There is a Datasheet/ directory, a Demo Application/ directory, an EVT/ directory, a SCHPCB/ directory for the reference schematics and PCB files, and a WCH-Link/ directory with a WCH-LinkUserManual.PDF and a WCH-LinkUtility/ directory for the programmer software. At the root there are two PDFs, the RISC-V QingKeV2 Microprocessor Debug Manual and CH32V003_IAP_Use_Introduction.pdf. There is a CH32V003_1Line_Base_on_CH32F103/ directory, a C++/ directory, and an image/ directory holding the system block diagram image the readme embeds.

That distribution is the interesting part. The WCH-Link tooling is included rather than left as a link, which matters because the debugger is the part of the workflow that is hardest to acquire if you do not already know the vendor's name. Single-wire debugging on a part this cheap usually means a specific programmer, and the readme's mention of the 1-wire serial debug interface tells you the part has no conventional debug port, so the WCH-Link is not optional.

The demo applications and the EVT directory are the other half. A manufacturer evaluation toolkit, in effect, published alongside the datasheet, which is how most developers for parts like this end up learning the peripheral registers.

The C++/ directory and the CH32V003_1Line_Base_on_CH32F103/ directory, which is a one-line display project based on a different, more capable part, suggest the repository collects worked examples beyond the base part.

Why the RISC-V core matters more than the price

The RISC-V2A core of barley is worth a sentence of its own, because it is the reason this part is interesting beyond its price.

The readme calls the core the QingKe 32-bit RISC-V2A processor, and the debug manual in the repository root is titled for the RISC-V QingKeV2 Microprocessor. The instruction set is open, so the toolchain options are not locked to one vendor, and the debug manual is a vendor document for a vendor core, which tells you the register-level detail is not going to be in the RISC-V specification.

The two levels of interrupt nesting are the other detail with design consequences. On a part with 2KB of SRAM, a nested interrupt handler that preempts another handler is a real design question, because the nested stack frame has to fit. The presence of the nesting feature alongside the tiny memory is a good example of the trade this part makes.

The debug manual and the IAP introduction PDF are the two documents that separate this from a datasheet dump. The IAP document in particular matters for a part with 16KB of flash, because in-application programming is how you update firmware on a device that may be physically inaccessible.

For a developer picking a microcontroller, the practical comparison is not against another RISC-V part at the same price but against the alternative of spending a few more cents on a part with more memory and a toolchain they already have installed. The CH32V003 wins on unit cost and loses on everything else, and the 2KB RAM figure is where that trade is decided.

Where this part is the wrong choice

There are three cases where choosing this part is a mistake, and none of them are about the price.

The first is a design that needs more than a couple of kilobytes of working memory. A 10-bit ADC sampling into a buffer, a display buffer, a protocol stack and a state machine will not fit in 2KB of SRAM with a stack and the C library also resident. The readme does not describe the RAM footprint of the vendor's runtime, so the number you can rely on is the total, and the total is small.

The second is a design that needs a peripheral this part does not have. There is one ADC group, one USART, one I2C group and one SPI group. A device with two sensors on SPI, or a design needing more than one UART, or anything requiring a hardware PWM output beyond the two timers, will not fit the bill, and there is no larger member of the CH32V003 family in this repository to upgrade to. The 96-bit unique ID and the two WDOGs are also the entirety of the watchdog story, so a safety-critical application has very little redundancy to work with.

The third is a product that has to be supported in three years. The repository is not archived and the last push was on 2026-10-19, so the documentation is current, but the readme describes no software support commitment, the licence for the repository is not identified, and the toolchain is the vendor's own WCH-Link utility plus a vendor core with a vendor debug manual. For a hobby, a prototype or a cost-driven consumer device, that is an acceptable dependency. For industrial equipment with a ten-year service life, it is a procurement question rather than an engineering one.

Editorial conclusion

This repository fits a developer starting a small embedded project on the CH32V003 who wants the datasheet, the debug manual, the example code and the WCH-Link utility in one place rather than hunting through vendor sites. It does not fit a team that needs a part with more memory, a mature ecosystem of libraries, or a vendor-supported toolchain with a warranty behind it. Before you commit a design to it, read the datasheet in the Datasheet/ folder for the electrical limits, and confirm that a 2KB SRAM budget is genuinely enough for what you intend to run.

Frequently asked questions

Official sources

1. Issues
2. openwch/ch32v003 on GitHub
3. README