neural-networks-on-silicon: a 2014 to 2026 paper index whose newest entry is a conference it already covers
This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
At a glance
- What is it?
- Neural Networks on Silicon is a curated bibliography of AI accelerator papers maintained by a Hong Kong University of Science and Technology professor. Its value is a thirteen-year index of where the field published. Its limits are equally clear: it is two files, a README and a site config, with no licence, no releases, and a list that stops mid-sentence partway through 2016 ISCA.
- Who is it for?
- This is a bibliography, not a project, and it is a good one. If you want a fast way into the accelerator literature without searching, the by year by venue index is the whole value and there is nothing here to install.
- Can I use it commercially?
- Not without permission. GitHub finds no licence file in the repository, and without a licence all rights are reserved by default: you may read the code but not reuse it. Check the README, or ask the authors, before using it.
- Is it still maintained?
- Activity is slowing. The repository last received commits 6 months ago.
- What is it written in?
- GitHub does not report a main language for this repository.
Answers come from the project's GitHub data, last synced on October 3, 2026, and from our analysis. They are not legal advice.
Editorial analysis
The whole project is a README and a site config
The repository has exactly two top level files. A README, and a configuration file that marks it as a site, which is how a GitHub Pages site is built from a repository. There is no source directory, no examples, no scripts, no tests, and no package manifest.
So this is a reading list that happens to be served as a web page. The configuration file is what turns a Markdown file into a browsable site, and it is the only piece of tooling in the repository.
That shape has a real consequence for anyone who finds it. You cannot install it, you cannot depend on it, and you cannot vendor it. If you want the index in your own tooling, you are scraping a rendered page.
The metadata also says the primary language is not code, which is the classifier's way of saying that a repository of paper titles and author affiliations has no dominant language. The repository description reflects the same evolution the page describes: it started as a collection of papers on neural network accelerators and is now the maintainer's selection of research on deep learning and computer architecture.
The single most transferable thing in the repository is therefore the organisation scheme itself, by year then by venue, which is a better shape for this literature than a flat list of links or a search index.
The list stops mid-sentence inside 2016 ISCA
The conference list runs in order from 2014 down to 2026, and partway through the 2016 ISCA section it stops:
- **Minerva: Enabling Low-Power, High-Accuracy Deep Neural Network Ac
The Minerva entry is cut off inside the word Accelerators, and nothing follows it. The 2016 ISCA heading introduced it as a paper with a bold title, so the reader knows a Minerva entry was started and never finished. That entry is the Minerva low power accurate neural network work, which is a well known result in the field, but the file itself does not say so.
So the visible list covers three venues in 2014, four in 2015, then 2016 onward, and the 2016 ISCA section is where the file ends mid line. Everything after that point is behind the cut. There are TOC entries for 2017 through 2026 and each names its venues, but the entries those links point to are not present in the file as it reads here.
This matters more than a cosmetic break because the entries after the cut would include the bulk of the canonical accelerator work the index is valued for. Minerva, Eyeriss, Cnvlutin and EIE are all in the visible portion and all early, which tells you the cut landed before the field's densest stretch rather than after it.
A reader should treat the first two years as the reliable part and verify anything from 2016 onward against the linked publications directly.
The venue index shows where the field published and when it stopped appearing
The table of contents is the most useful thing here and it is worth reading as data rather than as a link list.
It anchors every venue to a year, so you can see both which venues carried the work and when each one appeared. The 2016 to 2018 rows run to ten or eleven venues each, and the set is stable across those years: ISSCC, ISCA, MICRO, HPCA, ASPLOS, DAC, FPGA, ICCAD, DATE, VLSI, and HotChips. Add ASPDAC and FPL in the earlier years, FCCM in 2017, and ASSCC in 2019.
Then the list thins sharply. From 2022 the count drops to three or four venues, and by 2026 only two remain: ISSCC and HPCA. Every hardware conference has dropped out except those two.
There are two readings and neither is settled by the page. Either the work moved, either to the remaining venues or to arXiv and conference tracks that do not appear in a computer architecture list, or the maintainer stopped attending and reading them. Given that the page is framed as one person's selection rather than a systematic survey, the second reading is at least as likely as the first.
One thing the index does show clearly is the shape of the field's venues. ISSCC and the architecture conferences ISCA, MICRO, ASPLOS and HPCA carry the bulk, and the DAC material in particular is dominated by analog, near threshold, memristor and RRAM work rather than conventional digital accelerators, which is a real signal about what was being funded and published in that period.
Bold titles have no explanation and plain ones have no labels either
Some entries are in bold and some are not, and nothing on the page says what the bold means.
In the 2016 DAC section, DeepBurning and C-Brain are bold. So are their sibling entries in 2014 and 2015, the DianNao, DaDianNao, ShiDianNao and PuDianNao series, and Eyeriss and Cnvlutin in 2016 ISSCC and ISCA. Those are the canonical accelerator architectures, the ones that have their own Wikipedia entries and follow-up papers.
Everything else is plain text. Also in 2016 DAC, plain, are a neuromorphic accelerator from Pittsburgh and Tsinghua, a near threshold operating methodology paper from AMD, a JPEG hardware paper from Minnesota, and a domain wall memristor convolution unit from Purdue.
So the bold almost certainly marks the entries the maintainer considers foundational. But the page never says so, which leaves two problems for a reader. Someone skimming for a starting set and someone looking for the adjacent idea are given the same unlabelled list, and the second reader has no way to know that the unbolded RRAM paper is the interesting one.
DeepBurning is the one entry that breaks the pattern by carrying its own explanation. Its bold title is followed by three italic sub bullets describing a hardware generator with basic building blocks and an address generation unit written in RTL, a compiler with dynamic control flow for different models and data layout in memory, and a note that it simply reports the framework and describes some stages. That is the only annotation anywhere in the visible file.
One entry is also visibly malformed. A near threshold design methodology paper from AMD is in the list, and so is a second near threshold paper on opportunistic turbo execution from Utah State, and the year 2015 DAC lists a paper whose authors are given as one misspelled institution, Universtiy of Pittsburgh. Small things, but in a document whose entire value is citation accuracy they are worth noting.
No licence, no releases, and a page that ends seven months before the year it covers
Three metadata facts are worth stating plainly because a reader would otherwise assume them.
There is no licence. The licence field is empty, and there is no licence file in the repository root. The MIT licence that this project might plausibly have taken is not taken. So the terms under which the index may be copied, mirrored or redistributed are not stated. For a reading list that other people would most like to reuse, that is the first thing to raise with the maintainer rather than assume.
There are no releases. Nothing is tagged, nothing is archived, and there is nothing to pin. A reader who wants to cite a specific state of the index has to cite a commit.
And the content is seven months behind the frame. The last recorded push is 2026-03-30, and the index includes a 2026 section with ISSCC and HPCA entries for that year. So the most recent state has two conference entries for 2026 while the 2024 and 2025 rows list six each. Either the year is genuinely thin so far, or the index reflects only what had been published by the last push. There is no note on the page saying which.
The page also opens with a paragraph about the maintainer, his title, his centre directorship, an excellent young scientist designation, and his centre affiliation, plus a link to his homepage for more information. His research interest is stated as AI chip and system. The My Contributions heading that follows the table of contents has no list under it, only a sentence and a second link to a research page on the same homepage. So the repository named for one person's selection does not itself contain that person's papers.
Editorial conclusion
This is a bibliography, not a project, and it is a good one. If you want a fast way into the accelerator literature without searching, the by year by venue index is the whole value and there is nothing here to install. Bookmarked, it also functions as a map of which venues matter and when they peaked: ISSCC, MICRO, ISCA and HPCA carry most of the canonical work, and the solid state and analog computing material clusters in DAC. Treat it as a starting list rather than a survey, because nothing on the page says whether a paper is recommended, seminal, or merely interesting, and there is no abstract or annotation for most entries. Before you rely on it, note what it is not: there is no licence file and no licence metadata, so there is no stated permission to republish the index or mirror it, which for a reading list people want to reuse is the first thing to resolve. The My Contributions heading points at an external homepage and the page itself carries none of the author's own papers, so if you were looking for the maintainer's work this is not where it lives. The conference list is also seven months stale relative to the year the page covers, ending at two venues for 2026 while earlier years run to ten or more. And read it with the deeper limitation in mind: this is one researcher's reading list in an area he describes as one where fresh ideas appear every day, so a 2026 gap in, say, HPCA means nothing about HPCA and only something about what was on one person's screen that month. For a student looking for a topic, the most underused thing here is the entries that are not bolded and have no explanation. There are adjacent ideas sitting in plain text beside the headline work.
Frequently asked questions
What is the Neural Networks on Silicon repository for?
It is a curated collection of AI chip and computer architecture research papers, organised by year and by conference, covering venues from 2014 through 2026. It is maintained by Fengbin Tu, an Assistant Professor at HKUST, and is described as originally a collection of papers on neural network accelerators and now his selection of research on deep learning and computer architecture.
Which conferences does the neural networks on silicon index cover?
The table of contents lists architecture and hardware venues including ASPLOS, MICRO, ISCA, FPGA, DAC, ISSCC, HPCA, ICCAD, DATE, ASPDAC, VLSI, FPL, FCCM, HotChips and ASSCC, each anchored to a specific year so a reader can jump to one venue in one year.
Does the neural networks on silicon repository contain code?
No. The repository has two top level files, a README and a site configuration file. There is no source directory, no licence file and no releases. Its primary language is not detected as code because the content is a reading list rather than an implementation.
What licence applies to the neural networks on silicon paper list?
The repository states no licence and its metadata field is empty. There is no licence file in the repository root either, so the terms under which the index may be copied or redistributed are not stated anywhere in the repository.
Official sources
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