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schoeberl/chisel-book

chisel-book: teaching digital design with Chisel, slides and labs included

Digital Design with Chisel

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At a glance

What is it?
Digital Design with Chisel is a LaTeX book project by Martin Schoeberl that teaches hardware construction at a higher abstraction level than Verilog, and it ships as more than a PDF: the source, the course slides, the code generators and a separate lab repository. The licence on the repository is not declared, which is the first thing to check before reusing the text.
Who is it for?
chisel-book fits a lecturer preparing a one semester digital electronics course with Chisel, and it fits a self-learner who wants an introduction that starts above raw Verilog, but the repository does not declare a licence, so the text and figures cannot be reused in a course of your own without asking the author.
Can I use it commercially?
Not without permission. GitHub finds no licence file in the repository, and without a licence all rights are reserved by default: you may read the code but not reuse it. Check the README, or ask the authors, before using it.
Is it still maintained?
Yes. The repository last received commits 5 days ago.
What is it written in?
Mainly TeX, according to GitHub's language statistics.

Answers come from the project's GitHub data, last synced on November 7, 2026, and from our analysis. They are not legal advice.

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Editorial analysis

A book that ships with a course, not just a PDF

The repository holds the source of a book rather than a library, and the source is LaTeX, with the primary language listed as TeX. The main file is chisel-book.tex, and the bibliography is chisel.bib, alongside a Makefile and build.sbt. A compiled PDF is hosted separately at the DTU server, and the README notes that translations in Chinese, Japanese and Vietnamese are also available, which the cover images in the tree confirm with cover-small-chinese.jpg, cover-small-jp.jpg and cover-small-vi.jpg. The book has been through six editions, with tagged releases v4.0 in 2022, v5.0 in 2023 and v6.0 in 2025, and the last push was on 2026-10-05. So the content is revised on a schedule rather than frozen, which matters for anyone teaching from it.

Why the book argues for a higher abstraction level

The stated premise is that digital system design using Chisel is taught at a slightly higher abstraction level, with the goal of getting the reader up to speed to build more complex, interacting digital systems. That framing is the whole argument for the book. Verilog at the register-transfer level is verbose and error prone for anything with real interaction between components, and Chisel is a hardware construction language where you write Scala and emit hardware. The book is aimed at readers who already have some digital design background and want the productivity argument for Chisel made in a classroom setting. A companion repository of Chisel examples is pointed to from the README, and a lab repository exists separately, so the exercises are not confined to the pages either.

The Makefile runs the test suite before it writes the book

The build is unusual and worth understanding before you start. The default target is not a book target, it is all: test gencode fig book genslides, and the test target runs the sbt test suite. So a plain make will execute the Scala tests before a single page of text is typeset.

bash
make

The other targets show the structure. gencode runs a Scala script through sbt to generate the code listings that appear in the book, keywords and checkref do similar generation passes, fig builds the figures, and the book target runs pdflatex over chisel-book, then bibtex and makeindex, then pdflatex twice more, which is the standard LaTeX sequence for resolving cross references and the index. genslides runs the slide generation script inside the slides directory. There is also a chisel2_test target that runs RegisterTester and LogicTester from the chisel2 directory, and a chisel2_hw target that runs LogicHardware, so a second generation of the book's examples is exercised separately.

Building requires make, latex, sbt and a JDK, plus Verilator and z3 for some tests

The toolchain list in the README is explicit: make, latex, sbt and a Java JDK of 1.8 or later, and for some tests Verilator and z3 as well. The JDK requirement is not incidental, because the code generation and test targets are sbt tasks, and sbt needs a JVM. Verilator and z3 are only needed for some of the tests, which means a reader who only wants the typeset book can avoid them by building the book and figure targets directly rather than running the default target. The z3 dependency in particular points to the property checking exercises in the text, where a solver is needed to discharge the assertions. The clean target removes the auxiliary files, the code directory, test_run_dir, target and generated, and veryclean additionally runs git clean -fd, which is worth knowing about before you run it in a directory with work of your own.

Slides for a one semester course, and the DTU course that uses them

The book includes slides for a one semester course on digital electronics with Chisel, stored in three slide directories: slides, slides-tutorial and slides-agile, with doslides.sh invoked from the slides directory by the genslides target. A lecture plan for a course given at DTU is linked from the README, and that course page includes PDFs of the slides and the corresponding lab exercises, with the labs hosted in a separate chisel-lab repository. The three slide directories suggest three teaching modes rather than one: a tutorial progression, an agile variant, and the main deck. For an instructor this is the most immediately valuable part of the project, because adapting an existing semester of course content is a different job from writing one.

No licence is declared, which blocks reuse of the text itself

The licence situation is the significant caveat, and it is worth being blunt about it. The repository metadata does not declare a licence, so the default position under copyright applies: the text, the figures and the slides are copyrighted by their author and are not granted for redistribution, adaptation or inclusion in a course of your own. The code examples, the build system and the scripts are in the same repository and therefore in the same ambiguous state, even though a separate examples repository exists. The MIT licence that covers the Chisel tooling itself does not extend to this book, and the README says nothing about relicensing requests. If you want to translate the book, reuse a chapter in an internal curriculum, or fold the slides into a company course, that needs a conversation with Martin Schoeberl rather than a pull request. For personal study and for running the course as published, the situation is straightforward.

The build also generates VHDL, and the tree keeps old and new versions side by side

Two structural details in the tree are easy to miss and both signal how the project evolved. The Makefile has a vhdl target that runs make -C src/main/vhdl, so the source tree carries a VHDL implementation alongside the Chisel one, and the top level has both a src directory and a chisel2 directory, with separate test and hardware targets for the latter. The presence of src/main/vhdl and a second generation of examples side by side suggests the book was rewritten across a hardware description language change while keeping the older content in the tree. For a reader, the practical effect is that there is more than one version of some examples in the repository and the Makefile target names tell you which is current. The book also carries a data.txt file and a scripts directory, and an add-src directory for adding source listings, which is how new chapters pull in code listings.

Editorial conclusion

chisel-book fits a lecturer preparing a one semester digital electronics course with Chisel, and it fits a self-learner who wants an introduction that starts above raw Verilog, but the repository does not declare a licence, so the text and figures cannot be reused in a course of your own without asking the author. Before you build it, install make, latex, sbt and a Java JDK of 1.8 or later, and note that some tests additionally need Verilator and z3, and that the build target all runs the test suite before it generates any code, so a missing simulator tool breaks the book build itself.

Frequently asked questions

How do I build the chisel-book PDF from source?

You need make, latex, sbt and a Java JDK of 1.8 or later, and some tests additionally need Verilator and z3. Then you run make in the repository, and the book target runs pdflatex, bibtex and makeindex before two more pdflatex passes.

Which editions of Digital Design with Chisel exist?

The repository has tagged releases for the 4th edition on 2022-09-25, the 5th edition on 2023-01-30 and the 6th edition on 2025-02-02. A compiled PDF and translations in Chinese, Japanese and Vietnamese are hosted on the DTU server.

Can I reuse the chisel-book chapters and slides in my own course?

The repository does not declare a licence, so the text and figures are copyrighted by the author and are not granted for redistribution or adaptation. Ask the author directly before translating a chapter or folding the slides into an internal course.

Does the chisel-book repository include exercises and example code?

Yes. The book includes slides for a one semester course on digital electronics with Chisel, points to a lecture plan for a DTU course, and links a separate chisel-lab repository for lab exercises plus a chisel-examples repository for the example code.

Official sources

  1. Issues
  2. README
  3. Releases
  4. schoeberl/chisel-book on GitHub
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